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Hi các bạn hiện tại công ty bạn mình đang tuyển dụng những vị trí thiết kế vi mạch (Kinh nghiệm hoặc mới ra trường đếu có vị trí). Các bạn đọc thông tin tuyển dụng bên dưới nếu có hứng thú về mảng này thì ứng tuyển CV qua email: vienp@uniquify.com
Company Information
Uniquify
2030 Fortune Drive — Suite 200 - San Jose, CA 95131
Headquartered in Silicon Valley, Uniquify (www.uniquify.com) is a privately held ASIC design services
and semiconductor IP solutions provider. The company has design centers in Santa Clara, California,
Pune, India, Ho Chi Minh city and Da Nang city and it maintains sales offices in Austin, Santa Clara,
Seoul, Taipei and Tel Aviv. Uniquify provides leading edge SoC design and IP solutions. We offer a
wide range of “ideas2silicon” services that span design specification, RTL, logic design/verification,
physical implementation, and manufacturing operations. Perseus, our proprietary design management
system allows us to deliver consistent design closure and reduced schedules on even the most complex
SoC designs.
Job Information
Job Title: Junior Physical Design Engineer
Job Description
We are seeking a sharp and highly motivated person whom our experienced ASIC design team can teach
and train into an excellent ASIC design engineer. Candidate will work closely with our industry
experienced physical design and/or logical design ASIC team developing multi-million gate state of the art
System-on-Chip (SoC) designs. Candidate will gain understanding and practical knowledge in physical
design of ASICs. The internship will focus on the following but not limited to synthesis, simulation and
verification, static timing analysis, power analysis, as well as physical implementation (ex. floorplanning,
place&route) and verification. This is a great opportunity for anyone who wants to start a career in the
ASIC design industry.
Job Requirement
Completion of undergraduate program in Electrical Engineering or Computer Engineering.
Strong analytical and critical thinking skills.
Good communication skills, positive attitude, and ability to work in a team environment.
Exposure to a scripting languages such as TCL, Perl, and/or Make is a plus.
Good understanding of Fundamentals of Synchronous logic design.
Coursework in digital IC design a plus.
Experience with Verilog coding and verification a plus.
Project or industry experience in ASIC is a plus.
Applications Information
Email For Applications
vienp@uniquify.com
Company Information
Uniquify
2030 Fortune Drive — Suite 200 - San Jose, CA 95131
Headquartered in Silicon Valley, Uniquify (www.uniquify.com) is a privately held ASIC design services
and semiconductor IP solutions provider. The company has design centers in Santa Clara, California,
Pune, India, Ho Chi Minh city and Da Nang city and it maintains sales offices in Austin, Santa Clara,
Seoul, Taipei and Tel Aviv. Uniquify provides leading edge SoC design and IP solutions. We offer a
wide range of “ideas2silicon” services that span design specification, RTL, logic design/verification,
physical implementation, and manufacturing operations. Perseus, our proprietary design management
system allows us to deliver consistent design closure and reduced schedules on even the most complex
SoC designs.
Job Information
Job Title: Junior Physical Design Engineer
Job Description
We are seeking a sharp and highly motivated person whom our experienced ASIC design team can teach
and train into an excellent ASIC design engineer. Candidate will work closely with our industry
experienced physical design and/or logical design ASIC team developing multi-million gate state of the art
System-on-Chip (SoC) designs. Candidate will gain understanding and practical knowledge in physical
design of ASICs. The internship will focus on the following but not limited to synthesis, simulation and
verification, static timing analysis, power analysis, as well as physical implementation (ex. floorplanning,
place&route) and verification. This is a great opportunity for anyone who wants to start a career in the
ASIC design industry.
Job Requirement
Completion of undergraduate program in Electrical Engineering or Computer Engineering.
Strong analytical and critical thinking skills.
Good communication skills, positive attitude, and ability to work in a team environment.
Exposure to a scripting languages such as TCL, Perl, and/or Make is a plus.
Good understanding of Fundamentals of Synchronous logic design.
Coursework in digital IC design a plus.
Experience with Verilog coding and verification a plus.
Project or industry experience in ASIC is a plus.
Applications Information
Email For Applications
vienp@uniquify.com
