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1. SRAM Design
Job Description and Responsibilities
- Design and verify embedded CMOS memories
- Perform transistors level circuit optimization for performance, power and area
- Perform block level and full chip level simulations using mixed-signal simulators
- Monte-Carlo simulation of CMOS memory key building blocks
- Memory failure bitmap generation and analysis
Key Competency/Skill Requirements
- Self-motivated and detail-oriented
- Knowledge of CMOS memory circuit design
- Programming languages: Perl, Shell script, Tcl, Makefile, SKILL
- Hands-on tools: Hspice, Finesim, Virtuoso
- Good understanding of NLDM and CCS/CCSN format
2. Layout
Job Description
- Responsible for cell layout, block level layout, macro planning and interconnect.
- Compact layout is essential.
- Working under designer’s supervision to keep schedule and quality intact.
Job Requirements
- 1+ year’s analog/memory layout experience
- BS or MS in Electrical Engineering. Semiconductor courses preferred
- Hands-on 5 years plus in Semiconductor Integrated Circuit Layout Development
- Fluency in Unix, other programming language
- Fluency in mainstream CAD layout tools, skill works
- Fluency in Vietnamese, English, others are plus
- Professional ethic, team work
- No restriction to any country with Microchip’s presence
- Special skill in CAD system and IT is plus to support the layout team while the team size is small
CV send to kim.nguyen@microchip.com (Ms. Kim)
Job Description and Responsibilities
- Design and verify embedded CMOS memories
- Perform transistors level circuit optimization for performance, power and area
- Perform block level and full chip level simulations using mixed-signal simulators
- Monte-Carlo simulation of CMOS memory key building blocks
- Memory failure bitmap generation and analysis
Key Competency/Skill Requirements
- Self-motivated and detail-oriented
- Knowledge of CMOS memory circuit design
- Programming languages: Perl, Shell script, Tcl, Makefile, SKILL
- Hands-on tools: Hspice, Finesim, Virtuoso
- Good understanding of NLDM and CCS/CCSN format
2. Layout
Job Description
- Responsible for cell layout, block level layout, macro planning and interconnect.
- Compact layout is essential.
- Working under designer’s supervision to keep schedule and quality intact.
Job Requirements
- 1+ year’s analog/memory layout experience
- BS or MS in Electrical Engineering. Semiconductor courses preferred
- Hands-on 5 years plus in Semiconductor Integrated Circuit Layout Development
- Fluency in Unix, other programming language
- Fluency in mainstream CAD layout tools, skill works
- Fluency in Vietnamese, English, others are plus
- Professional ethic, team work
- No restriction to any country with Microchip’s presence
- Special skill in CAD system and IT is plus to support the layout team while the team size is small
CV send to kim.nguyen@microchip.com (Ms. Kim)
